
/* -----------32bit reg tester-------------*/
/*
module test();
	reg iClk, rst;
	reg [1:0] sel;
	reg [31:0] d;
	wire [31:0] q;
	Register_32bit reg1(iClk, 1'b1, d, q, sel[1:0]);

	  initial #400 $finish;
	  initial begin iClk=0; forever #10 iClk=~iClk; end
	    initial fork
		#10 d = 32'h0000001;
		#10 sel[1:0] = 2'b11;
		#50 d = 32'h0000002;
		#50 sel[1:0] = 2'b00;
		#100 sel[1:0] = 2'b11;
		#150 d = 32'h00000003;
		#150 sel[1:0] = 2'b00;
		#180 ;
	    
    
	  join
endmodule
*/
/* test for instmemomry
module test();
	reg iClk, MemWrite;
	reg [6:2] Address;
	reg [31:0] WriteData;
	wire [31:0] ReadData;
	InstMemory i1(iClk, MemWrite, Address, WriteData, ReadData);
	  initial #400 $finish;
	  initial begin iClk=0; forever #10 iClk=~iClk; end
	    initial fork
		#10 MemWrite = 1'b1;
		#10 Address = 5'b00001;
		#10 WriteData = 32'h00000001;
		#30 MemWrite = 1'b0;
		#30 Address = 5'b00001;
		#30 WriteData = 32'h00000001;
		#50 MemWrite = 1'b1;
		#50 Address = 5'b00001;
		#50 WriteData = 32'h00000002;
		#60 MemWrite = 1'b0;
		#150 MemWrite = 1'b0;
		#180 ;
	    
    
	  join
endmodule
*/
module mux_tb();
  reg [31:0] in1,in2,in3,in4,in5,in6,in7,in8,
            in9,in10,in11,in12,in13,in14,in15,in16,
            in17,in18,in19,in20,in21,in22,in23,in24,
            in25,in26,in27,in28,in29,in30,in31,in32;

  reg [4:0] sel;
  reg clk;
  wire [31:0] out;

  MUX32to1_32bit m1(in1,in2,in3,in4,in5,in6,in7,in8,
            in9,in10,in11,in12,in13,in14,in15,in16,
            in17,in18,in19,in20,in21,in22,in23,in24,
            in25,in26,in27,in28,in29,in30,in31,in32,sel,out);
 // JWDatapath h1(Clk, Rst);
  initial #300 $finish;
  initial begin Clk=0; forever #5 Clk=~Clk; end
  initial fork
  //Rst = 1'b0;
  /*
  #1 in1 = 32'b00000000000000000000000000000001;
  #1 sel = 5'b0001; 
  
  #3 in2 = 32'b00000000000000000000000000000010;
  #3 sel = 5'b0001;
  
  #5 in3 = 32'b00000000000000000000000000000100;
  #5 sel = 5'b0001;
  
  #7 in4 = 32'b00000000000000000000000000001000;
  #7 sel = 5'b0001;
  
  #8 in5 = 32'b00000000000000000000000000010000;
  #8 sel = 5'b0001;
  
  #9 in6 = 32'b00000000000000000000000000100000;
  #9 sel = 5'b0001;
  
  #10 in7 = 32'b00000000000000000000000001000000;
  #10 sel = 5'b0001;

  #11 in8 = 32'b00000000000000000000000010000000;
  #11 sel = 5'b0001;
  
  #12 in9 = 32'b00000000000000000000000100000000;
  #12 sel = 5'b0001;
  
  */
  join
  
endmodule


